Wednesday, May 20, 2009

Parameter space of "standing" circuit

I've been working on decomposing the traveling pulse circuit in order to understanding the parameter space. Today I've worked on the isolated "standing" circuit.

There's two parts. The "pull down" gate that is constantly trying to pull the system to a negative value against the action of the resistor which is trying to pull it to zero. The ratio of the pull down gate (1) to the resistor (RNAase) determines the steady-state level when the feedback gate 3 is not active. The RNAase resistor must be common to all nodes so I treat it as a fixed parameter; I picked the value 0.01 out of thin air for it.

For the following graphs, I pick different starting conditions for "standing" and let this circuit evolve. Each colored trace in the chart is one run of the circuit. Note that there are two steady states. One is about 28 and the other is about -1. If the "standing" value falls below about -0.5 then it goes to the low steady-state and above that it goes high. I like this chart in comparison to typical transform function plots because it lets you see both the kinetics and the steady-states in one place.

Here's the same chart but zoomed in around the origin so you can see that the critical point is about -0.5 which is determined by the gate model.

I varied the two parameters over a range and plotted the parameter space result (best viewed on large monitor).

From top to bottom p1 is increasing. From left to right p2 is increasing. Increasing p2 shifts the steady-state of the "standing" state upwards and thereby separates the two states more dramatically. As p1 is increased -- moving from top to bottom -- both the top and bottom steady-states shift downwards but the bottom one seems to move faster. In the lower left, the two states blur into each other and are poorly defined. So, in general you'd like to push p2 and p1 fairly high but this comes at the cost of slowing down the approach to steady-state as they are pushed further away. When the other half of the circuit is added, p2 value will have to be smaller than p5, so that will determine the upper bound of p2.

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